Computer Organization : Direct Memory Access (DMA) Implementation: Differentiating Cycle Stealing DMA and Burst Mode DMA

Direct Memory Access (DMA) is a technique used in computer systems to offload data transfer tasks from the CPU to dedicated DMA controllers. DMA enables high-speed data transfer between peripheral devices and memory without CPU intervention, freeing up the CPU to perform other tasks. DMA is commonly used in scenarios where large data blocks need to be moved efficiently, such as disk I/O, network transfers, and graphics rendering.

Here’s an outline of how DMA is implemented and a comparison between cycle stealing DMA and burst mode DMA:

Implementation of DMA:

The implementation of DMA involves the following components and steps:

a. DMA Controller: The DMA controller is a dedicated hardware unit responsible for managing DMA transfers. It is often integrated into the chipset or as a standalone controller on the motherboard.

b. DMA Request and Acknowledge: The peripheral device (e.g., disk controller) requests DMA transfer by asserting a DMA request (DRQ) signal to the DMA controller. The DMA controller acknowledges the request by asserting a DMA acknowledge (DACK) signal back to the peripheral.

c. Arbitration: In systems with multiple devices requesting DMA simultaneously, the DMA controller uses arbitration to determine the priority of each request and grants DMA access to the highest-priority device.

d. Address and Data Bus Control: The DMA controller takes control of the address and data buses during DMA transfers. It uses the bus control signals to read data from or write data to the peripheral and memory locations.

e. Buffering: The DMA controller may have internal buffers to temporarily store data during transfers, reducing the contention on the system bus and improving performance.

f. DMA Transfer Modes: DMA can be performed in different modes, such as cycle stealing DMA and burst mode DMA, depending on the requirements of the system and the peripheral.

Cycle Stealing DMA:

Cycle stealing DMA is a mode where the DMA controller steals bus cycles from the CPU. It takes control of the system bus during each data transfer and pauses the CPU’s operation temporarily. The CPU resumes operation when the DMA transfer is completed.


  • Simple and easy to implement.
  • Suitable for systems with low DMA traffic and CPU tasks that can tolerate occasional pauses.


  • May introduce delays in CPU processing due to cycle stealing.
  • Not efficient for high-bandwidth DMA operations.

Burst Mode DMA:

Burst mode DMA is a mode where the DMA controller takes control of the bus for an extended period and performs multiple data transfers in rapid succession without interrupting the CPU. It can transfer data in bursts, fetching several words or bytes in one DMA request.


  • Minimizes CPU interruptions, leading to higher overall system performance.
  • Efficient for high-bandwidth DMA operations.


  • Requires careful handling of data buffering and bus contention to avoid data overwrites.
  • More complex to implement compared to cycle stealing DMA.
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