The execution of an instruction in a computer involves several steps that together make up the Instruction Execution Cycle. This cycle is repeated for each instruction fetched from memory and is typically divided into the following steps:
Instruction Fetch (IF): The first step is to fetch the instruction from memory. The program counter (PC) holds the address of the next instruction to be fetched. The CPU sends this address to the memory unit, and the instruction residing at that address is retrieved and placed in the instruction register (IR) within the CPU. Additionally, the program counter is updated to point to the address of the next instruction in memory.
Instruction Decode (ID): In this step, the opcode (operation code) of the instruction stored in the instruction register (IR) is extracted and analyzed. The opcode specifies the type of operation to be performed by the CPU, such as arithmetic, logical, data movement, or control transfer instructions.
If the instruction requires additional operands, the CPU determines the locations of these operands (registers, memory addresses, immediate values) based on the addressing modes specified in the opcode.
Operand Fetch (OF): If the instruction requires operands (data) from memory or registers, the CPU fetches these operands during this step. The addressing modes from the previous step help determine the locations of the operands. The fetched operands may be stored in temporary storage locations within the CPU, known as registers.
Execute (EX): The actual operation specified by the instruction is performed in this step. For example, if the instruction is an addition operation, the CPU takes the values of the source operands, adds them together, and stores the result in the destination operand. Similarly, different operations (logical, arithmetic, etc.) are executed based on the opcode and the fetched operands.
Memory Access (MA): If the instruction involves memory operations (e.g., loading data from memory or storing data to memory), this step handles them. The effective memory address is calculated based on the addressing modes and operands determined earlier. The CPU communicates with the memory unit to read or write data from or to the memory location.
Write Back (WB): The final step is to store the result of the operation back to the destination location, if necessary. This step is mostly relevant for instructions that modify register values. The result is stored in the appropriate register or memory location, depending on the instruction.
Increment the Program Counter (PC): After the instruction is executed, the program counter (PC) is incremented to point to the address of the next instruction in memory, preparing the CPU for the next instruction fetch.
